logic synthesis tool造句
例句與造句
- this design for mvbc system adopts top-down eda common design flow . circuit design adopts veriloghdl coding description . function simulation and timing verification adopt simulation tool vcs of synopsys inc, the logic synthesis tool and fpga programming tool adopt the quartus ii of altera inc, and the fpga advice stratix ii ep2s15
該mvbc系統(tǒng)設(shè)計采用業(yè)界通用的自上而下的eda設(shè)計方法,電路邏輯實現(xiàn)采用veriloghdl硬件語言描述,功能和時序驗證的動態(tài)仿真采用synopsys公司的vcs,而邏輯綜合與fpga實現(xiàn)采用altera公司的集成開發(fā)環(huán)境quartusii軟件以及stratixiiep2s15的fpga器件。 - It's difficult to find logic synthesis tool in a sentence. 用logic synthesis tool造句挺難的